1. Field of the Invention
This invention relates to a semiconductor device used in liquid-crystal display devices, microprocessors, dynamic RAMs and so forth, and to a process for its fabrication.
2. Related Background Art
Semiconductor devices are being made much more high-speed and highly-integrated with an increase in demand for making electronic products that have higher performances. Accordingly, wiring structures and their fabrication processes are required to satisfy the following demands.
(1) Low-resistant and stable ohmic contacts can be achieved even when contact holes or through holes are made finer than ever. PA1 (2) Although contact holes, through holes, via holes and so forth have a stepped structure, any layers formed thereon should have a flat structure. PA1 (3) The insides of the contact holes or through holes are filled with the W metal and have a higher resistance than the metals such as Al or Cu, which cause an increase in resistance at the contact holes or through holes. PA1 (4) Not do the deposition of W by CVD and the smoothing by CMP result in a high cost but these steps also require complicated procedure, and also it is difficult to remove particles (e.g., abrasive particles) in the step of CMP, which gives rise to a serious problem with lower yields, resulting in a higher total cost than conventional techniques.
However, the above requirements cannot be met by using conventional methods, in which one forms wiring of an aluminum material such as Al--Si or Al--Si--Cu followed by patterning. For example, when a wiring material is deposited inside contact holes or through holes, voids 10 as shown in FIG. 8 or stepped portions may occur. Especially when the contact holes or the like have an aspect ratio of 1 or more, such voids may remarkably occur.
Accordingly, to meet the requirements (1) and (2), a technique employing CPM (chemical mechanical polishing) has been developed.
The CMP technique is one in which, e.g., a barrier metal such as titanium nitride (TiN) is thinly provided after contact holes or through holes have been formed by patterning, where tungsten (W) is further deposited on the barrier metal such as TiN by CVD (chemical vapor deposition) so that the contact holes or via holes are filled with W, followed by CMP to smooth the surface, and thereafter Al type or Cu type wiring is formed to make patterning.
Such a technique can meet the above requirements (1) and (2). However, this method has the following problems.
Thus, these steps must be carried out in a simpler manner, and a good yield obtained.